Packaged semiconductor dies, including memory chips, microprocessor chips, and imager chips, typically include one or more semiconductor dies mounted on a package substrate and encased in a plastic protective covering. Each semiconductor die includes an integrated circuit and bond pads electrically connecting the integrated circuit to a plurality of wirebonds. The wirebonds are coupled to the package substrate, and, in turn, the package substrate electrically routes signals between the die and a printed circuit board connected to off-chip electrical devices.
Some die packages have through-silicon vias (TSVs) in lieu of wirebonds. A TSV extends through a hole in the substrate of the die. The TSV can electrically connect the die (or another die stacked on top of the die) to the package substrate. TSVs can reduce the package footprint and improve electrical performance.
When forming TSVs, a barrier material is deposited on the sidewall of the hole containing the TSV. The barrier material adheres the bulk material of the TSV, such as copper, to the sidewall and prevents electromigration of the bulk material into the substrate sidewall. One challenge with barrier materials is that they are prone to expand and contract more than the silicon material of the substrate during the manufacturing process. The difference in the expansion and contraction between the barrier materials and the silicon material can lead to delamination of the barrier material along with the TSV from the sidewall of the hole containing the TSV.